1. Field of the Invention
This invention relates generally to a method and apparatus for adjusting the registration in a color television camera having a plurality of color pick-up tubes and, more particularly, to a method and apparatus for performing registration adjustments by dividing the effective image area into a plurality of segmented image areas and adjusting registration at each segmented image area.
2. Description of the Background
In a multi-tube color television camera having a plurality of image pick-up devices, such as red, green, and blue pick-up tubes, extremely complex control systems are typically required in order to achieve registration of the images produced by the respective color image pick-up tubes. In general, one known approach is to correct the beam deflection currents so as to align the central positions of the output images of each of the respective image pick-up tubes. One previously proposed approach provides registration adjusting apparatus for a color television camera having three image pick-up tubes in which the picture screen is divided into a plurality of segmented image areas and a registration test chart is reproduced. In the proposed system, the registration adjustment is effected at each segmented image area in order to achieve uniform registration over the entire area of the screen, and such system is disclosed in U.S. Pat. No. 4,503,456 issued May 5, 1985 and assigned to the Assignee hereof.
FIG. 1 is a representation of television screen that is useful in explaining the system that has been previously proposed. Generally, the effective image area of a color television camera is divided into an odd number of rows and an odd number of columns, for example, seven rows and seven columns, thereby providing forty-nine segmented image areas. Nevertheless, in order to more simply explain the previously proposed system, an effective image area 1 is shown in FIG. 1 consisting of three rows and five columns, thereby providing fifteen segmented image areas 2.sub.11 to 2.sub.15, 2.sub.21 to 2.sub.25, and 2.sub.31 to 2.sub.35. The registration test chart includes a cross mark "+" at the center of each segmented area that form a three-by-five matrix in the horizontal and vertical directions, respectively. The optical image 4.sub.ij of a cross mark "+" is focused at the center of each segmented image area 2.sub.ij.
In the previously proposed system, it is generally the approach to perform registration of the red signal from the red image pick-up tube and the blue signal from the blue pick-up tube with reference to the green signal from the green pick-tube. Of course, it is understood that any one of the three colors could be originally chosen as the reference to which the other two colors are registered. Thus, for each segmented area of effective image area 1, the registration error data representing the registration errors in the vertical direction (V-errors) and registration errors in the horizontal direction (H-errors) of each of the red and blue image pick-up tubes are detected relative to the green image pick-up tube, which is used as the reference.
Generally, such registration error data is converted into digital data and stored temporarily in a corresponding location of a memory. Thus, in the instant example, such memory areas would have matrix addresses corresponding to the three rows and five columns of image area 1 in FIG. 1. Each memory area, thus defined, then stores the registration error data representing the H-error and V-error for a respective segmented image area. The data stored in the respective vertically adjacent elements of the memory area are then interpolated to obtain the error data for each scanning line using a digital approximation technique. A similar interpolation operation also takes place with the data stored in the memory areas that are adjacent each other in the horizontal direction, however, interpolation in that case may be performed as analog signal processing using a low-pass filter. Generally, the horizontal interpolation does not require digital signal processing techniques. Then, the registration compensating data that is stored in the memory areas is read out in synchronism with a scanning signal and is converted into an analog correction signal used to control the horizontal and vertical deflecting currents.
By use of this known technique, a correction of the image size of each image pick-up tube, the deflection linearity, the skew distortion, and pincushion distortion or the like may be simultaneously achieved over all of the segmented image areas during registration compensation.
Therefore, it is seen that by use of the above-described automatic technique the image registration adjusting operation for a color television camera having a plurality of image pick-up tubes is much simpler than the previously employed manual technique, in which each color is adjusted in registration by visually viewing the screen and making manual adjustments.
One example of a conventional registration adjusting system for a color television camera having a plurality of image pick-up tubes is shown in FIG. 2. In that system a television camera is provided with three image pick-up tubes 11G, 11R, and 11B that produce the green, red, and blue components of the color signal, respectively. Image pick-up tubes 11G, 11R, and 11B are provided, respectively, with deflection coils 12G, 12R, and 12B and the output video signals from such pick-up tubes are supplied to respective preamplifiers 13G, 13R, and 13B.
A deflection control circuit, shown generally at 20, includes horizontal and vertical sawtooth waveform generating circuits 21H and 21V. Vertical sawtooth waveform generating 21V circuit provides an output fed directly to a drive amplifier 22G, as well as outputs fed to drive amplifiers 22R and 22B through a one horizontal scan period (1H) delay line 23 and adders 24R and 24B. Similarly, horizontal sawtooth waveform generator 21H supplies an output directly to a drive amplifier 25G, as well as outputs to drive amplifiers 25R and 25B through a .DELTA.T delay line 26 and adders 27R and 27B. The output from drive amplifiers 22G, 22R, and 22B and the outputs from the other corresponding amplifiers 25G, 25R, and 25B are fed directly to the corresponding deflection coils 12G, 12R, and 12B of the image pick-up tubes. Accordingly, in this approach the phase of the output signal from green image pick-up tube 11G is used as a reference to perform registration compensating and such phase is advanced relative to the phases of the output signals from the red and blue image pick-up tubes 11R and 11B by 1H in the vertical direction and by .DELTA.T in the horizontal direction.
In producing the signals used for registration compensation, an edge signal generating circuit, sown generally at 30, is provided that has as one input the green image signal produced by green image pick-up tube 11G fed to amplifier 13G whose output is a signal represented at waveform A in FIG. 3. The output of amplifier 13G is fed through a pair of 1H delay lines 31 and 32, with the output of delay line 32 being fed to the minus input of a subtracting circuit 33, to which is input at the plus input the original, undelayed signal from amplifier 13G, so that subtracting circuit 33 produces a pulse having a width of 2H, as shown in waveform C of FIG. 3 that corresponds to the horizontal edge of the image. The signal at the junction point P between delay lines 31 and 32 is fed through a pair of .DELTA.T delay lines 34 and 35 and is also fed directly to the plus input of a second subtracting circuit 36. Therefore, an output signal similar to the output from subtracting circuit 33 is produced by subtracting circuit 36, that is, an edge signal having a pulse width of 2.DELTA.T that corresponds, however, to the vertical edge of the image instead of the horizontal edge signal produced by subtracting circuit 35. In the present embodiment 2.DELTA.T equals approximately 300 nanoseconds.
The output signal from subtracting circuit 33 is fed through a .DELTA.T delay line 37 to contact V (vertical) of a change-over switch 38. Similarly, the output from subtracting circuit 36 is fed to contact H of switch 38, so that the edge signals representing the horizontal and vertical edges of the image can be alternately selected using switch 38. This edge signal has a positive polarity at the leading edge of the video signal and a negative polarity at the trailing edge of the video signal. The edge signal is fed to an edge detector circuit 39 that generates a sampling pulse corresponding in time to the edge signal, and the sampling pulse is represented at waveform D in FIG. 3.
The signal at a junction Q between delay lines 34 and 35 is the output of amplifier 13G having been passed through delay lines 31 and 34 and, thus, is the output signal from amplifier 13G having been delayed by an amount (1H+.DELTA.T) and is represented at waveform E in FIG. 3. The signal at junction Q is then fed to the negative input of a comparator circuit 41 whose other input, positive, is derived from a change-over switch 42 that has two inputs connected through amplifiers 13R and 13B to color image pick-up tubes 11R and 11B, respectively. It is these signals that contain the registration errors to be compensated using the green signal as the reference.
Thus, the output from comparator 41 is a position error signal representing the amount of registration error in the image produced by red or blue image pick-up tube 11R or 11B with respect to the reference image from green image pick-up tube 11G. This position error signal is then supplied to a multiplier 43 wherein it is multiplied by either the horizontal or vertical edge signal, waveform C of FIG. 3, which is the output of switch 38. Therefore, if switch 38 is in the position shown in FIG. 2 then the position error amount is given as .DELTA.V and the output from multiplier 43 is a position error signal of magnitude .DELTA.V relating to either the upper or lower registration error of the output image of the red or blue image pick-up tube 11R or 11B, depending upon the position of switch 42, with respect to the reference output image of green image pick-up tube 11G.
Similarly, when switch 38 is connected in the opposite state to that shown in FIG. 2, the output of multiplier 43 is a position error signal of magnitude .DELTA.H with a direction of either the left-hand or right-hand side of the horizontal registration error of the output image from red or blue image pick-up tubes 11R or 11B relative to the reference output image of green image pick-up tube 11G.
The position error signal from multiplier 43, waveform H of FIG. 3, is fed to a sample-and-hold circuit 44, which samples and holds signal .DELTA.H for the duration of a sampling pulse, represented at waveform D of FIG. 3, and produces a DC sample-and-hold voltage. The DC sample-and-hold voltage, the waveform of which is shown at J in FIG. 3, corresponds in level and polarity to the error signal output from multiplier 43. Sampling pulse D is supplied to sample-and-hold circuit 44 through a so-called slice circuit 45 to eliminate noise components and also through an AND gate 46. The opening and closing of AND gate 46 is controlled by a sampling gate pulse G fed thereto from a control circuit, shown generally at 50 through a pulse shaper 57. The sampling gate G pulse fed to AND gate 46 is generated by control circuit 50 in correspondence with each of the segmented image areas 2.sub.ij of segmented image area 1 of FIG. 1.
Control circuit 50 includes a central processing unit (CPU) 51 that comprises a micro-computer and suitable memories, a read only memory (ROM) 52, and a random access memory (RAM) 53. RA 53 has the matrix addresses stored therein that correspond to the segmented image areas 2.sub.11 to 2.sub.35, as described herein-above, and also includes a memory area to store the interpolation data, also described herein-above. The output waveform of sample-and-hold circuit 44 is shown at waveform J at FIG. 3 and is fed to an input of comparator 54 wherein it is compared with a reference voltage, which in this case is ground potential or zero volts, to thereby detect the polarity of the registration error data, that is, up or down or left or right. The comparison output signal from comparator 54 will go to a high or low level depending upon the polarity of the registration error data and is fed to the up/down (UD) input terminal of an up/down counter 55. Counter 55 has the vertical sync signal V.sub.D supplied thereto at input CK as a clock pulse so that up/down counter 55 counts up or down in accordance with a high or low level, respectively, of the comparison output signal of comparator 54. The data from up/down counter 55 is supplied as input data to CPU 51. It should be noted that the functional equivalent of up/down counter 55 could be readily achieved using a microcomputer program in CPU 51. Furthermore, various operational programs for the interpolation, as well as programs for controlling the entire system, can also be a part of this microcomputer system by being written into ROM 52.
The horizontal drive signal HD and the vertical drive signal VD are supplied as trigger pulses to the clock signal generator 56, from which is derived clock pulses that are synchronized with the horizontal and vertical scanning operations of the image pick-up tubes 11G, 11R, and 11B. This clock pulse signal is then fed to CPU 51 that serves to actuate gate pulse generator 57 to produce the gate pulses G fed to AND gate 46. This gate pulse G is generated by gate pulse generator 57 to correspond with the center of each segmented image area 2.sub.ij of image 1.
Thus, in response to the positions of switches 38 and 42, the registration error data represents whether the output image from red image pick-up tube 11R or blue image pick-up tube 11B is mis-directed in either the horizontal or vertical direction with respect to the reference output image from green image pick-up tube 11G. This data is then sequentially stored in CPU 51 at every segmented image area 2.sub.11, 2.sub.12, . . . 2.sub.15 of the rows of image area 1 or at every segmented image area 2.sub.11, 2.sub.21 and 2.sub.31 of the respective columns of image area 1. Therefore, a four-channel registration adjustment can be effected, such four channels comprising the red vertical (R/V), the blue vertical (B/V), the red horizontal (R/H), and the blue horizontal (B/H).
A demultiplexer, shown generally at 60, is provided for demultiplexing or reordering this four-channel registration data and such demultiplexer includes four memories 61, 62, 63, and 64 that are connected via a data bus to CPU 51. Accordingly, the stored registration compensation data are read out from memories 61, 62, 63, and 64 in synchronism with the scanning operations of the respective image pick-up tubes 11G, 11R, and 11B. Such stored registration compensation data is converted into analog signals by digital-to-analog converters (D/A) 65, 66, 67, and 68 and the suitably converted data is then fed to adder circuits 24R, 24B, 27R, and 27B, which form a portion of the deflection control circuit 20.
When the registration adjustment of a particular channel in the selected segmented image area 2.sub.ij of the image area 1 commences, for example, if it is desired to perform registration adjustment in channel R/V, then the maximum compensation width W and an initial value D.sub.0 are set in up/down counter 55 based upon the desired accuracy with which the respective image pick-tube 11G, 11R, and 11B are mounted in the color television camera. Because this system is a comparative control system no compensation data will be generated based on the initial value D.sub.0.
Assuming that the output from sample-and-hold circuit 44, as represented by waveform J in FIG. 3, has a positive polarity at a time when the first clock pulse is supplied to up/down counter 55, then the comparison output from comparator 55 will go to a high level so that the count value of the up/down counter 55 will be incremented from the initial value D.sub.0 by an amount W/2 to a new value D.sub.1. This action of the count value and up/down counter 55 is represented in FIG. 4, in which the ordinate axis represents the count value in counter 55 and the abscissa represents time, such time being based on the clock pulses fed to the counter. Therefore, it is seen that with a value W/2 in counter 55 digital-to-analog convertor 65 provides a compensation amount corresponding to this increased amount W/2 to adder 24R of deflection control circuit 20. Accordingly, the output from red drive amplifier 22R is increased and the position of the red image is moved in the direction to decrease the registration error of image pick-up tube 11R relative to green image pick-up tube 11G.
Now, sample-and-hold circuit 44 will again supply a registration error signal to comparator 54 representing the new position of this image based upon the change introduced by drive amplifier 22R. If the output from sample-and-hold circuit 44 has a positive polarity at the time when the second clock pulse is supplied to up/down counter 55, the output from comparator 54 will again be at a high level so that up/down counter 55 counts up from value D.sub.1 to value D.sub.2 by an amount W/4. Then, D/A converter 65 supplies the compensation amount corresponding to the increased amount W/4 to adder 24R of deflection control circuit 20 and the red image is adjusted accordingly. Thus, it is seen that the content of the up/down counter 55 is incremented or decremented by the compensating width W/2.sup.m which is reduced at every compensation by one-half and, thus, the compensation signal is converged to the desired value, denoted as D.sub.F. This compensating width function can be set in counter 55 by CPU 51, particularly when counter 51 is a software implementation in the microcomputer.
When the compensation width that is set or determined by the output of counter 55 reaches to within one bit of the limit of counter 55, that is, in this example W/32 as represented in FIG. 4, the content of counter 55 is incremented or decremented by one bit at every compensation point thereafter. However, if the increment or decrement by one bit is effected four times, for example, this repetition is detected by CPU 51 and is determined that the compensating data has been converged to the desired value D.sub.F. Accordingly, the content D.sub.8 of the up/down counter 55 at that time is stored at a predetermined address in RAM 53.
After the registration adjustment for one of the four channels has been completed for all of the segments of segmented image area 1, which might require for example 10 fields per column, the registration adjustment for the remaining three channels is then sequentially performed, with the result that the image pick-up tubes 11R and 11B will produce output images with no color mis-registration relative to the green image pick-up tube 11G.
In FIG. 1 image area 1 is divided into a large number of segmented image areas, and if the centering adjustment is first effected with respect to the central one of the segmented image areas, then the center of the output image of image pick-up tube 11G and the centers of the output images of the pick-up tubes 11R and 11B are in coincidence with each other and the registration adjustment for each of the segmented image areas is effected. Because the center areas are in coincidence, the compensation amounts for the respective other segmented image areas are substantially reduced.
An extremely fine registration adjustment can be performed using a similar procedure to obtain even better results by setting the minimum compensation width of the up/down counter 55 to a smaller value after completion of the above-described registration adjustment.
The previously proposed apparatus described herein-above typically operates at a speed such that registration adjustment for one channel per column of the plurality of segmented image areas of the pick-up image area takes approximately 10 fields of the video signal. Thus, in a color television camera operating according to the NTSC system, in which the image area is divided into segmented image areas of seven rows and seven columns, one registration adjustment will require around 280 video fields or approximately 4.7 seconds. This time period, while seeming short, is a practical drawback in that it hinders rapid registration adjustment of the video camera.
The above unacceptable time is based on the NTSC color television camera, however, when a television camera operating according to the high definition television system (HDTV) is employed and registration compensation is performed, the number of segmented image areas will be increased typically to 13 rows and 13 columns. Accordingly, one registration adjustment will then take a time equivalent of 520 video fields or approximately 8.7 seconds. This time, of course, is entirely too long for rapid registration adjustment.